In the design of digital and analog electrical circuits, oftentimes it is necessary to delay a signal or multiple signals by a predetermined time period in order to account for the additional time that is required for other related signals to propagate through a portion of a circuit. In order to match these times and to provide simultaneous input and/or output of various signals into or out of the circuit, delay circuits are added, as needed, to properly match the related signals in time. In analog circuits, delay circuits typically delay the starting time of an analog waveform. In digital circuits, delay circuits typically adjust the phase of digital signals by delaying the rising and/or falling edges of the digital pulses.
One type of delay circuit is the variable delay circuit, which is used to provide an adjustable time delay to the propagating signals. Variable delay circuits are needed when the relative time offset between signals is not always consistent. In this situation, the time delays apportioned to the various signals can be adjusted accordingly to maintain consistent time offsets or synchronization, whichever the particular case may be.
Variable delay circuits may be used, for example, in an integrated circuit (IC) tester containing a waveform generator. In an IC tester, the waveform generator generates a waveform, which may consist of a group of test signals. The test signals are applied to an IC under test and the output signals from the IC are measured to determine whether or not the IC provides an acceptable output response. Since the waveform generator of the IC tester supplies various signals to different inputs of the IC, it is important that the test signals are applied within a specific time period. If the test signals are applied inaccurately, due to improper timing or delay circuits, poor test results may be incorrectly attributed to a fault in the IC. For this reason, variable delay circuits can provide more accurate timing delays for test signals of a waveform generator in an IC tester.
Many conventional variable delay circuits, however, may be configured with capacitance circuits for adjusting the delay. With a capacitance circuit, these conventional variable delay circuits will typically control the negative-going pulse but not the positive-going pulse. As a result, a phenomenon known as pulse-width modulation (PWM) will result. If an attempt is made to create a higher resolution variable delay circuit in which a plurality of these conventional circuits are placed in series, the problem of PWM arises such that the pulse width is diminished by each stage until it is totally eliminated when too many of these circuits are connected in series. Thus, the number of delay circuits that can be connected in series, and therefore the resolution, is limited.
Also, in delay circuits having capacitance elements, a finer resolution typically cannot be achieved because of the nature of the capacitance elements. The time delay resolution is usually limited by the smallest MOSFET element that can be fabricated in the circuit.
Conventional delay circuits may also suffer from additional noise in the circuit because they typically contain current sources that tend to vary. Therefore, with additional noise, the consistency and accuracy of the delay provided by conventional variable delay circuits deteriorates. Thus, a need exists in the industry to address the aforementioned and/or other perceived deficiencies and inadequacies.